MESI protocol

Tag: mesi

Aliases: MESI, Illinois protocol

A four-state cache-coherence protocol (Modified, Exclusive, Shared, Invalid) for multiprocessor caches. Adds Exclusive to MSI to avoid bus traffic on private writes.

Lecture references

• L16 · Multiprocessors — p.16 , p.18 , p.28 , p.30 , p.35 , p.37 , p.39 , p.48 , p.65 , p.71